1. Technical Field
The present invention relates to a method for setting a transistor operating point and a circuit therefor, a method for changing a signal component value and an active-matrix liquid crystal display device for use in a projector, a notebook-sized PC, a monitor, a viewer, Personal Digital Assistance (PDA), a portable telephone, a game machine, electrical household appliances, etc.
2. Description of Related Art
Following developments of multi-media agent, various types liquid crystal display devices covering from compact-scale type display devices used in a projector device, a portable telephone, etc. to large-scale type display devices used in a notebook-sized PC, a monitor, a television set, etc. have been rapidly popular. Besides, middle-scale type liquid crystal display devices have been indispensable for electronic equipment such as a viewer, PDA, etc., and further for even playing machines such as a portable game machine, a pachinko machine, etc. On the other hand, liquid crystal display devices have been used over various fields containing electrical household appliances such as freezers, microwave ovens, etc. Particularly, an active-matrix liquid crystal display device operated by thin film transistors has been mainly used because it provides higher resolution and higher image quality as compared with a simple matrix type liquid crystal display device.
FIG. 72 shows a pixel circuit for one pixel of a conventional active-matrix liquid crystal display device. As shown in FIG. 72, the pixel of the active-matrix liquid crystal display device comprises an MOS transistor (Qn) (hereinafter referred to as “transistor (Qn)”) in which a gate electrode is connected to a scan line 901, any one of a source electrode and a drain electrode is connected to a signal line 902 and the other of the source and drain electrodes is connected to a pixel electrode 903, a storage capacitor 906 formed between the pixel electrode 903 and a storage capacitor electrode 905, and liquid crystal 908 sandwiched between the pixel electrode 903 and an opposed electrode Vcom 907.
In notebook-sized PCs which have dominated a large application market for liquid crystal display devices, an amorphous silicon thin film transistor (hereinafter referred to as “a-SiTFT”) or a polysilicon thin film transistor (hereinafter referred to as “p-SiTFT”) is used as the transistor (Qn) 904, and twisted nematic liquid crystal (hereinafter referred to as “TN liquid”) is used as liquid crystal material. FIG. 73 shows an equivalent circuit to TN liquid crystal. As shown in FIG. 73, the equivalent circuit of TN liquid crystal can be represented by a circuit comprising a capacitance component C3 of liquid crystal (electrostatic capacitance of Cpix) and both of a resistor R1 (resistance value Rr) and a capacitor C1 (electrostatic capacitance of Cr), the capacitance component C3 and both the resistor R1 and the capacitor C1 being connected in parallel. Here, the resistance value Rr and the electrostatic capacitance Cr are components for determining the response time constant of liquid crystal.
FIG. 74 is a timing chart showing the relationship of a gate scan voltage Vg, a data signal voltage Vd and a voltage Vpix of the pixel electrode 903 (hereinafter referred to as “pixel voltage”) when TN liquid as described above is operated by the pixel circuit shown in FIG. 72. As shown in FIG. 74, during a horizontal scan period, the gate scan voltage Vg is set to high level Vgh to set an n-type MOS transistor (Qn) 904 to ON state, and the data signal voltage Vd inputted on a signal line 902 is transferred through the transistor (Qn) 904 to the pixel electrode 903. TN liquid normally operates in a so-called normally white mode in which light is transmitted through the TN liquid under no applied voltage.
In this case, a voltage at which light transmission through TN liquid is high is applied as the data signal voltage Vd over several fields. When the horizontal scan period is finished and the gate scan voltage Vg is set to low level, the transistor (Qn) 904 is set to OFF state, and the data signal voltage transferred to the pixel electrode 903 is held by the storage capacitor 906 and the capacitance Cpix of the liquid crystal. At this time, the pixel voltage Vpix undergoes a voltage shift called as a field through voltage via the capacitance between the gate and source of the transistor (Qn) 904 at the time when the transistor (Qn) 904 is set to OFF state. This voltage shift is represented by Vf1, Vf2, Vf3 in FIG. 74, and the amount of the voltage shift Vf1 to Vf3 can be reduced by setting the capacitance of the storage capacitor 906 to a large value.
The pixel voltage Vpix is held until the gate scan voltage Vg is set to high level to select the transistor (Qn) 904 again during the next field period. The TN liquid is switched in response to the pixel voltage Vpix thus held, and the display state based on transmission light from the liquid crystal transits from a dark state to a light state as indicated by variation in light transmittance T1. At this time, as shown in FIG. 74, the pixel voltage Vpix is varied by .DELTA.V1, .DELTA.V2, .DELTA.V3 during the holding period in each field. This is because the capacitance of the liquid crystal is varied in conformity with the response of the liquid crystal. Normally, for suppressing the fluctuation of the capacitance, the storage capacitor 906 is designed to have capacitance which is several times (two or three times) or more as large as the pixel capacitance Cpix. As described above, the TN liquid is driven by the pixel circuit shown in FIG. 72.
However, as is apparent from the variation of the light transmittance shown in FIG. 74, the response time of the TN liquid is normally large, that is, it ranges from 30 to 100 msec, and thus an after-image remains when an object moving at high speed is displayed, so that there is a disadvantage that no clear display can be achieved. Furthermore, there is a disadvantage that the angle of visual field is small. Therefore, there has been actively studied and developed liquid crystal material having polarization and liquid crystal display devices using the liquid crystal material with which high response is achieved and a broad angle of visual field is provided.
As shown in FIG. 75, the equivalent circuit of high-response liquid crystal having polarization can be represented by a circuit having a circuit comprising a resistor R2 (resistance value Rsp) and a capacitor C2 (electrostatic capacitance Csp) connected to each other in series, and a high-frequency pixel capacitor C3 (electrostatic capacitance Cpix) which is not varied even when polarization is rotated, the circuit concerned and the high-frequency pixel capacitor C3 being connected to each other in parallel. The construction of the equivalent circuit is similar to the equivalent circuit of the TN liquid crystal shown in FIG. 73, however, the resistor R2 and the capacitor C2 for determining the response time of liquid crystal is different from that of TN liquid crystal, and they are illustrated in another diagram to be discriminated as components contributing to the response of polarization.
As such liquid crystal material having polarization may be used ferroelectric liquid crystal, antiferroelectric liquid crystal, thresholdless antiferroelectric liquid crystal, deformed helix ferroelectric liquid crystal, twisted ferroelectric liquid crystal, monostable ferroelectric liquid crystal or the like. Particularly, when thresholdless antiferroelectric liquid crystal, deformed helix ferroelectric liquid crystal, twisted ferroelectric liquid crystal or monostable ferroelectric liquid crystal is used for a liquid crystal display device, not only high response and a broad angle of visual field are achieved, but also gradation display can be performed by using an active-matrix liquid crystal display device as shown in FIG. 72, which is described by using thresholdless antiferroelectric liquid crystal as an example in “JAPAN JOURNAL OF APPLIED PHYSICS, Volume. 36, p 720 (Japan Journal of Applied Physics, Volume 36, p. 720 (hereinafter referred to as reference document 1)).
FIG. 76 is a timing chart showing a gate scan voltage Vg a data signal voltage Vd and a pixel voltage Vpix when thresholdless antiferroelectric liquid is driven by the conventional pixel circuit shown in FIG. 72. As shown in FIG. 75, the gate scan voltage Vg is set to high level VgH during the horizontal scan period to set the transistor (Qn) 904 to ON state, and the data signal voltage Vd input to the signal line 902 is transferred to the pixel electrode 903 through the transistor (Qn) 904. The thresholdless antiferroelectric liquid crystal normally operates in a so-called normally black mode in which light is not transmitted through the thresholdless antiferroelectric liquid crystal when a voltage is not applied.
When the horizontal scan period is finished and the gate scan voltage Vg is set to low level, the transistor (Qn) 904 is set to OFF state, and the data signal voltage Vd transferred to the pixel electrode 903 is held by the storage capacitor 906 and the high-frequency pixel capacitor C3 of the liquid crystal. At this time, the pixel voltage Vpix undergoes a voltage shift called as a field through voltage via the gate-source capacitance of the transistor (Qn) 904 at the time when the transistor (Qn) 904 is set to OFF state like the case where the TN liquid crystal described above is driven.
Furthermore, after the horizontal scan period is finished, the pixel voltage Vpix is varied by .DELTA.V1, .DELTA.V2, .DELTA.V3 in each field by redistribution of the charges held in the high-frequency capacitor C3 and the polarization-based capacitor Csp as shown in FIG. 76. According to the driving method disclosed in the reference document 1, the gradation control is performed on the basis of the pixel voltage Vpix after the voltage variation described above.
At this time, in FIG. 75, the light transmittance is varied as indicated by T1, and the thresholdless antiferroelectric liquid crystal can be driven by the pixel circuit shown in FIG. 72.
Furthermore, a liquid crystal display device using liquid of OCB mode is described as high-response liquid crystal having no polarization in IDRC 97, P.L-66). OCB-mode liquid crystal uses bend orientation of TN liquid crystal, and it can be switched at a speed higher than the conventional TN liquid crystal by single figure. Furthermore, a display having a broad angle of visual field can be achieved by using a biaxial phase-contrast compensating film. In addition, time-divisional driving type color liquid crystal devices using high-response liquid crystal such as ferroelectric crystal, OCB-mode liquid crystal or the like have been recently actively studied and developed.
For example, JP-A-7-64051 discloses a time-divisional driving type of liquid crystal device using ferroelectric liquid. Furthermore, IDRC 97, p 37 reports a time-divisional driving type color liquid crystal display device using OCB-mode liquid crystal.
In the time-divisional driving type liquid crystal display device, color display is implemented by successively switching light incident to liquid crystal among red, green and blue during one-field period. Therefore, high-response liquid crystal responding within at least one-third of the one-field period is needed. When the time-divisional driving type liquid crystal display device is applied to a direct-view type liquid crystal display device such as a notebook-sized PC, a monitor or the like, no color filter is required, and thus the liquid crystal display device can be manufactured at low price. Furthermore, when it is applied to a projector device, a high aperture ratio having the same level as a three-plate type liquid light valve and color display can be implemented by a single-plate liquid crystal display device, thereby providing a compact, light, low-price and high-brightness liquid projector device.
When TN liquid, ferroelectrics liquid crystal or antiferroelectric liquid crystal having polarization, high-response TN liquid responding within one-field period is driven according to the conventional pixel circuit and driving method as described above, the following disadvantages occur.
As described above, when TN liquid is driven by the pixel circuit shown in FIG. 72, the pixel voltage Vpix undergoes the voltage variation of .DELTA.V1 to .DELTA.V3 due to the variation of the liquid crystal capacitance during the holding period as shown in FIG. 74. The voltage variation amount is also varied in accordance with the operation amount of liquid crystal molecules. Therefore, there occurs a disadvantage that even when the same data signal voltage is written, the voltage to be originally written to the liquid crystal cannot be applied at all times over the holding period because it is dependent on the data signal voltage written in the previous field. As a result, although the light transmittance of the liquid crystal should originally varies like a curved line indicated by T0 of FIG. 74, it actually varies like a curved line indicated by T1 described above. Therefore, accurate gradation display cannot be performed. In order to reduce the voltage variation .DELTA.V1 to .DELTA.V3, a solving method of setting the accumulative capacitance to a large value has been hitherto utilized. In this case, however, the aperture ratio can be reduced.
When ferroelectric liquid crystal or antiferroelectric liquid crystal having polarization is driven, the pixel voltage Vpix undergoes voltage variation of .DELTA.V1 to .DELTA.V3 by polarization switching during the holding period as shown in FIG. 76. AS described above, this voltage variation is caused by the redistribution of the charge held in the high-frequency capacitor C3 shown in FIG. 75 and the charge held in the capacitor C2 due to the polarization Here, Csp has a large value which is five to one hundred times as large as Cpix.
Therefore, the voltage variation .DELTA.V1 to .DELTA.V3 becomes a large value exceeding 1 to 2 voltages, and thus it is required to magnify the amplitude of the data signal voltage. As a result, the power consumption of the liquid crystal display device is increased, and the signal processing circuit, the peripheral driving circuit and the pixel transistor are required to be designed to have large withstand voltages, and it results in rise-up of the price of the liquid crystal display device. Furthermore, the amount of the voltage variation .DELTA.V1 to .DELTA.V3 is varied by the data signal voltage written in the previous field, so that the light transmittance of liquid crystal should originally vary like the curved line indicated T0 shown in FIG. 76, however, it actually vary like the curved line indicated by T1 as described. Therefore, it is impossible to perform the accurate gradation control every filed. Accordingly, when the liquid crystal having polarization described above is applied to the time-divisional driving system of liquid crystal device, color display having excellent color reproducibility cannot be performed.
The same disadvantage as the liquid crystal display device using the liquid crystal material having polarization as described above occurs in the liquid crystal display device using OCB-mode liquid crystal.
In order to solve these disadvantages, JP-A-7-64051 discloses a liquid crystal display device using a monocrystal silicon transistor. The construction of the liquid crystal display device shown in FIG. 18 in JP-A-7-64051 has a disadvantage that a transistor Q2 operating as a source follower type analog amplifier circuit is not reset. Therefore, the transistor Q2 is kept under OFF state when a data signal voltage lower than a data signal voltage written previously is input, and the voltage corresponding to the data signal voltage cannot be output. Furthermore, in the construction shown in FIG. 18 of JP-A-7-64051, the transistor Q2 is set to OFF state after it outputs a data signal voltage to a picture electrode 10. Therefore, when polarization current of ferroelectric liquid crystal flows afterwards, there occurs the same disadvantage as described above in which the voltage of the picture electrode is varied.
A liquid crystal display device disclosed in Japanese Patent No. 003042493 (hereinafter referred to as reference patent) (JP-A-11-326946) is provided as a liquid crystal display device for solving the above disadvantage. According to this liquid crystal display device, in an active-matrix liquid crystal display device in which pixel electrodes are driven by MOS transistor circuits disposed in the neighborhood of the respective cross points of plural scan lines and plural signal lines, each of the MOS transistor circuits comprises an MOS transistor having a gate electrode connected to one of the scan lines and source and drain electrodes any one of which is connected to one of the signal lines, an MOS type analog amplifier circuit having an input electrode connected to the other of the source and drain electrodes of the MOS transistor and an output electrode connected to the pixel electrode, and a voltage holding capacitor formed between the input electrode of the MOS type analog amplifier circuit and a voltage holding capacitance electrode.
According to the reference patent described above, the pixel voltage Vpix during the holding period can be kept to a fixed voltage. FIG. 77 (FIG. 52 attached to the reference patent) is a diagram showing an example of the pixel circuit having the analog amplifier circuit. As shown in FIG. 77, a scan line 101 is connected to the gate electrode of a switching MOS transistor (Qn) 1101, a signal line 102 is connected to the source electrode, the drain electrode of the MOS transistor 1101 is connected to the input electrode (the gate electrode of the n-type MOS transistor 1102) of an analog amplifier circuit (comprising an n-type MOS transistor 1102 and an n-type MOS transistor 1103), and the pixel electrode 107 of liquid crystal display element 109 is connected to the output electrode of the analog amplifier circuit, and a voltage is applied to liquid crystal between the pixel electrode 107 and an opposed electrode 108 to drive the liquid crystal.
When no analog amplifier circuit is used, the storage capacitor 906 is formed between the pixel electrode 903 and the accumulative capacitance electrode 905 as shown in FIG. 72 (corresponding to FIG. 59 attached to the reference patent).
As shown in FIG. 77, when the analog amplifier circuit is used, a voltage holding capacitor 106 is formed between the voltage holding capacitance electrode 105 and the contact point between the switching MOS transistor (Qn) 1101 and the analog amplifier circuit.
The power supply source lines of the analog amplifier circuit are respectively connected to amplifier positive power supply source electrode and amplifier negative power supply source electrode which are separately provided, or one of the lines is connected to the scan line while the other line is connected to an existing electrode such as the voltage holding capacitance electrode or the like, thereby simplifying the circuit construction.
FIG. 77 (FIG. 52 attached to the reference patent) shows a case where the amplifier positive power supply source electrode is provided, and the amplifier negative power supply source electrode is connected to the voltage holding capacitance electrode 105. According to this circuit construction, when the switching MOS transistor is set to OFF state, a predetermined voltage is continued to be applied to the liquid crystal element 109 from the analog amplifier circuit, so that the voltage variation can be suppressed.
However, when the conventional MOS analog amplifier circuit described above is constructed by Poly-Si TFT or the like, the following disadvantages occur. A first disadvantage resides in that the gain of the analog amplifier circuit is low. The gain of the amplifier is ideally equal to 1. In the case of a prototype produced by the inventor of this application, a gain of 0.78 was achieved by a resistance load type analog amplifier circuit, and a gain of 0.84 was achieved by an active load type analog amplifier circuit having a TFT current source as a load.
The reason why reduction in gain as described above occurs resides in that Ids (drain-source current) is greatly varied dependently on Vds (drain-source voltage) even under the condition that Vgs (gate-source voltage) is fixed. Particularly Ids is remarkably increased in an area where Vds is large. This phenomenon is estimated to be mainly caused by the kink effect. Furthermore, since it is observed that Ids is dependent on Vds in an area where Vgs is low, there may be other causes than the kin effect. When the dependence of Ids on Vds occurs as described above, Vds varies at the operating point of the analog amplifier circuit. The output voltage of the source follower amplifier circuit is represented by the following equation:Vout=Vin−Vgs 
In the above equation, Vin represents an input voltage to the source follower amplifier circuit, and Vout represents an output voltage from the source follower amplifier circuit. Accordingly, when Vgs is varied, the linearity between Vin and Vout is lost, and the gain of the analog amplifier circuit is reduced.
The present invention has been implemented in view of the above situation, and has an object to provide transistor operating point setting method and circuit that effectively use the characteristics of unipolar transistor having a multi-gate structure, a signal component value changing method and an active-matrix liquid crystal display device.